Nathan J. Conrad
Engineering · Purdue University West Lafayette
Publications
28
Citations
2,086
Est. group size
—
Recurring co-author estimate
Active years
12
Publishing since 2013
Nathan J. Conrad works on integrated circuit and semiconductor device design, spanning topics like power amplifiers for 5G wireless systems, negative-capacitance transistors, and low-noise nanoscale transistors. His work also extends into applied circuit designs for wireless neural recording implants, hardware security for supply-chain verification of chips, and sensors for spacecraft debris impact monitoring. This suggests a focus on translating device-level semiconductor physics into practical circuits and sensing systems.
Publication output peaked in 2017 and has since slowed to a low, irregular cadence of about one paper per year over the last five years.
Generated by claude-sonnet-5 from public bibliographic data · Jul 20, 2026
- New Zealand blackcurrant extract modulates the heat shock response in men during exercise in hot ambient conditions
European Journal of Applied Physiology · 2024
- Validating Supply Chain against Recycled COTS ICs using I/O Pad Transistors: A Zero-Area Intrinsic Odometer Approach
2024
- Design, fabrication, and hypervelocity impact testing of screen-printed flexible micrometeoroid and orbital debris impact sensors for long-duration spacecraft health monitoring
Aerospace Science and Technology · 2023
- A 0.43 g Wireless Battery-Less Neural Recorder With On-Chip Microelectrode Array and Integrated Flexible Antenna
IEEE Microwave and Wireless Components Letters · 2022
- A Stacked Transistors CMOS SOI Power Amplifier For 5G Applications
2022
- Integrated Implantable Electrode Array and Amplifier Design for Single-chip Wireless Neural Recordings
2020
- High-Efficiency Stacked Cell CMOS SOI Power Amplifiers for 5G Applications
2019
- Implementation of A Differential mm-Wave CMOS SOi Power Amplifier
2019
- Mobility Fluctuation-Induced Low-Frequency Noise in Ultrascaled Ge Nanowire nMOSFETs With Near-Ballistic Transport
IEEE Transactions on Electron Devices · 2018
- Steep-slope hysteresis-free negative capacitance MoS2 transistors
Nature Nanotechnology · 2017
- A low power programmable dual-slope ADC for single-chip RFID sensor nodes
2017
- Steep Slope MoS2 2D Transistors: Negative Capacitance and Negative Differential Resistance
arXiv (Cornell University) · 2017
- Anomalous bias temperature instability on accumulation-mode Ge and III-V MOSFETs
2017
- Plasmonic enhanced polarization sensitive black phosphorus photodetection device
2017
- High-Performance InAlN/GaN MOSHEMTs Enabled by Atomic Layer Epitaxy MgCaO as Gate Dielectric
IEEE Electron Device Letters · 2016
- Nature Nanotechnology×1
- IEEE Electron Device Letters×1
- Aerospace Science and Technology×1
- IEEE Transactions on Electron Devices×1
- IEEE Microwave and Wireless Components Letters×1
- Muhammad Masuduzzaman
Engineering · Purdue University West Lafayette
- H.Y. Yu
Engineering · The Ohio State University
- P. D. Ye
Engineering · Purdue University West Lafayette
- Suman Datta
Engineering · Purdue University West Lafayette
- Eunseon Yu
Engineering · Purdue University West Lafayette
This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.
Last updated Jul 20, 2026.
Claim or correct this profile