Michael Jin
Engineering · The Ohio State University
Publications
50
Citations
256
Est. group size
~10
Recurring co-author estimate
Active years
37
Publishing since 1990
Michael Jin's research focuses on the reliability and failure analysis of silicon carbide (SiC) power transistors, particularly a type called MOSFETs used in high-voltage electronics. His work develops methods to test and screen these devices for defects—such as short-circuit tolerance, gate oxide breakdown, and avalanche stress—to improve their consistency and durability for use in power electronics applications like electric vehicles and industrial equipment. This is a highly applied, device-testing-oriented area of electrical and semiconductor engineering.
Publication output was minimal or absent before 2021 but has grown substantially since, peaking around 2024 with a slight decline in 2025, indicating a recent and rapidly expanding research program.
Generated by claude-sonnet-5 from public bibliographic data · Jul 20, 2026
- A Novel Low-Voltage-Based Methodology for Short-Circuit Withstand Time Screening of Commercial 4H-SiC MOSFETs
Electronics · 2026
- Investigation of the Effect of Gate Oxide Screening with Adjustment Pulse on Commercial SiC Power MOSFETs
Electronics · 2025
- Investigation of Time-Dependent Dielectric Breakdown on Commercial SiC MOSFETs Using Constant-Voltage and Pulse-Voltage
IEEE Transactions on Electron Devices · 2025
- Optimization of Gate Oxide Screening Technology for Commercial SiC Discrete MOSFETs and Power Modules
Key engineering materials · 2025
- Repetitive-Avalanche-Induced Degradation in 1.2-kV SiC Trench-Gate MOSFETs and a Practical R-UIS-Based Screening Method
IEEE Transactions on Power Electronics · 2025
- Failure and Degradation Analysis of Commercial 1.2-kV SiC Trench MOSFETs Under Repetitive Short-Circuit Stress
IEEE Transactions on Electron Devices · 2025
- Short Circuit Withstand Time Screening of 1.2 kV Commercial SiC MOSFETs: A Non-Destructive Approach
Electronics · 2025
- Artificial Neural Network-Based Screening Method for Short-Circuit Withstand Time in Packaged SiC MOSFETs to Enhance Device Consistency
IEEE Electron Device Letters · 2025
- Analyzing the Impact of Gate Oxide Screening on Interface Trap Density in SiC Power MOSFETs Using a Novel Temperature-Triggered Method
Micromachines · 2025
- Analysis and Optimization of Burn-In Techniques for Screening Commercial 1.2-kV SiC MOSFETs
IEEE Transactions on Electron Devices · 2024
- Evaluation of Burn-in Technique on Gate Oxide Reliability in Commercial SiC MOSFETs
2024
- A Non-destructive Short Circuit Withstand Time Screening Methodology for Commercially Available SiC Power MOSFET
2024
- Methodology for Determining Critical Screening Voltage in SiC MOSFETs Through Gate Leakage Current Hysteresis
2024
- Investigation on gate oxide reliability under gate bias screening for commercial SiC planar and trench MOSFETs
Materials Science in Semiconductor Processing · 2024
- An Investigation of Body Diode Reliability in Commercial 1.2 kV SiC Power MOSFETs with Planar and Trench Structures
Micromachines · 2024
- Electronics×5
- IEEE Transactions on Electron Devices×4
- Micromachines×2
- IEEE Transactions on Power Electronics×2
- Materials Science in Semiconductor Processing×1
- Monikuntala Bhattacharya
Engineering · The Ohio State University
- Dallas Morisette
Engineering · Purdue University West Lafayette
- Hengyu Yu
Engineering · The Ohio State University
- Limeng Shi
Engineering · The Ohio State University
- Tianshi Liu
Engineering · The Ohio State University
This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.
Last updated Jul 19, 2026.
Claim or correct this profile