Radu Teodorescu
Engineering · The Ohio State University
Publications
53
Citations
1,647
Est. group size
~1
Recurring co-author estimate
Active years
26
Publishing since 2001
Radu Teodorescu's research focuses on computer architecture security, particularly finding and mitigating hardware-level vulnerabilities such as speculative execution and side-channel attacks that can leak sensitive data even from supposedly protected systems like trusted execution environments. His work also touches on efficient hardware design for machine learning inference on edge devices, and some recent publications explore an unrelated area of helicopter propeller aerodynamics.
Publication output rose to a peak around 2021-2022 and has since slowed to a lower but still steady pace of a few papers per year.
Generated by claude-sonnet-5 from public bibliographic data · Jul 20, 2026
- PIV-Informed Modeling of a Compound Helicopter Pusher Propeller
2026
- Fingerprinting Attacks on Machine Learning-Based Hardware Prefetchers
IEEE Computer Architecture Letters · 2026
- Proximity Effects of a Pusher Propeller on Compound Helicopter Performance
2025
- MicroSampler: A Framework for Microarchitecture-Level Leakage Detection in Constant Time Execution
2025
- PERFORMANCE AND PIV-INFORMED MODELING OF A COMPOUND HELICOPTER PUSHER PROPELLER
Open MIND · 2025
- TEESec: Pre-Silicon Vulnerability Discovery for Trusted Execution Environments
2023
- TEESec: Pre-Silicon Vulnerability Discovery for Trusted Execution Environments
Zenodo (CERN European Organization for Nuclear Research) · 2023
- Wind-Tunnel Performance Investigation of an Electric Medium-Sized Variable-RPM Rotor
2023
- A Pre-Silicon Approach to Discovering Microarchitectural Vulnerabilities in Security Critical Applications
IEEE Computer Architecture Letters · 2022
- A Systematic Look at Ciphertext Side Channels on AMD SEV-SNP
2022 IEEE Symposium on Security and Privacy (SP) · 2022
- ENCLYZER: Automated Analysis of Transient Data Leaks on Intel SGX
2022
- Special Issue on Top Picks From the 2021 Computer Architecture Conferences
IEEE Micro · 2022
- INTROSPECTRE: A Pre-Silicon Framework for Discovery and Analysis of Transient Execution Vulnerabilities
2021
- Fused DSConv: Optimizing Sparse CNN Inference for Execution on Edge Devices
2021
- A Fused Inference Design for Pattern-Based Sparse CNN on Edge Devices
2021
- arXiv (Cornell University)×5
- IEEE Computer Architecture Letters×3
- USENIX Security Symposium×1
- 2022 IEEE Symposium on Security and Privacy (SP)×1
- IEEE Micro×1
- Lakshmi Narasimhan Chakrapani
Engineering · The Ohio State University
- Kaushik Roy
Engineering · Purdue University West Lafayette
- Kaushik Roy
Engineering · Purdue University West Lafayette
- Risi Jaiswal
Engineering · Purdue University West Lafayette
- Anand Raghunathan
Computer Science · Purdue University West Lafayette
This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.
Last updated Jul 19, 2026.
Claim or correct this profile