Risi Jaiswal
Engineering · Purdue University West Lafayette
Publications
10
Citations
73
Est. group size
~4
Recurring co-author estimate
Active years
10
Publishing since 2017
Risi Jaiswal works in engineering with topics associated to low-power VLSI (chip) design, neural networks, and quantum computing algorithms, though the specific relevance of these areas is not well established in the available data. One identifiable publication concerns automated regression testing tools used in post-silicon validation, a step in verifying that manufactured computer chips work as intended. Given the very limited public record, prospective students should treat this profile as only a partial picture of the research focus.
Publication output has been sparse and irregular over the last decade, with several zero-output years followed by a recent uptick in the most recent years.
Generated by claude-sonnet-5 from public bibliographic data · Jul 20, 2026
- arXiv (Cornell University)×3
- IEEE Access×1
- IEEE Transactions on Artificial Intelligence×1
- npj Unconventional Computing×1
- IEEE Journal of Solid-State Circuits×1
- Radu Teodorescu
Engineering · The Ohio State University
- Kaushik Roy
Engineering · Purdue University West Lafayette
- Lakshmi Narasimhan Chakrapani
Engineering · The Ohio State University
- Kaushik Roy
Engineering · Purdue University West Lafayette
- Jonghoon Jin
Computer Science · Purdue University West Lafayette
This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.
Last updated Jul 20, 2026.
Claim or correct this profile