Hsiang-Wen Chen
Engineering · University of Michigan
Early career · publishing since 2020
Analog and Mixed-Signal Circuit DesignAdvancements in PLL and VCO TechnologiesCCD and CMOS Imaging SensorsAdvancements in Semiconductor Devices and Circuit DesignPhotonic and Optical Devices
Publications
10
Citations
142
Est. group size
~2
Recurring co-author estimate
Active years
6
Publishing since 2020
In context
Among 583 early career Engineering PIs within our index
Citations: 142p25 70 · p75 315 · cohort median 150
Publications / year (recent): 1.0p25 1.8 · p75 3.8 · cohort median 2.6
Typically publishes in teams of ~4 · 0% small-team papers (≤3 authors) · across 1 venues
Publication cadence
Publications per year over the last 10 years — averaging 1.0/year recently
Recent publications
- A 34.3 dB SNDR, 2.3GS/s, Sub-radix pipeline ADC using incomplete settling technique with background radix detector
Analog Integrated Circuits and Signal Processing · 2021
Publishes in
- IEEE Journal of Solid-State Circuits×4
- Analog Integrated Circuits and Signal Processing×1
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This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.
Last updated Jul 25, 2026.
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