Timur Ibrayev
Engineering · Purdue University West Lafayette
Publications
19
Citations
267
Est. group size
—
Recurring co-author estimate
Active years
11
Publishing since 2014
Timur Ibrayev's research focuses on hardware-efficient and brain-inspired computing systems, including memristor-based circuits for pattern and face recognition, analog in-memory computing accelerators, and neural network robustness to adversarial attacks. More recent work explores active vision systems (models that mimic how eyes and brains actively focus attention) and how these designs relate to security and efficiency in machine learning hardware. This research sits at the intersection of computer engineering, neuromorphic hardware design, and computer vision.
Publication output was concentrated around 2017 with a slower and more variable pace afterward, including a gap in 2022-2023 followed by a resurgence of activity in 2024.
Generated by claude-sonnet-5 from public bibliographic data · Jul 20, 2026
- Toward Two-Stream Foveation-Based Active Vision Learning
IEEE Transactions on Cognitive and Developmental Systems · 2024
- Semantic-Syntactic Discrepancy in Images (SSDI): Learning Meaning and Order of Features from Natural Images
arXiv (Cornell University) · 2024
- Pruning for Improved ADC Efficiency in Crossbar-based Analog In-memory Accelerators
arXiv (Cornell University) · 2024
- On Inherent Adversarial Robustness of Active Vision Systems
arXiv (Cornell University) · 2024
- THEORY AND TECHNOLOGY OF MANUFACTURING A FERROALLOY FROM CARBON FERROCHROME DUSTS
Acta Metallurgica Slovaca · 2021
- On the Intrinsic Robustness of NVM Crossbars Against Adversarial Attacks
2021
- Robustness Hidden in Plain Sight: Can Analog Computing Defend Against Adversarial Attacks?
arXiv (Cornell University) · 2020
- TraNNsformer: Clustered Pruning on Crossbar-Based Architectures for Energy-Efficient Neural Networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2019
- Introduction to Memristive HTM Circuits
InTech eBooks · 2018
- On-chip face recognition system design with memristive Hierarchical Temporal Memory
Journal of Intelligent & Fuzzy Systems · 2018
- Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2017
- HTM Spatial Pooler With Memristor Crossbar Circuits for Sparse Biometric Recognition
IEEE Transactions on Biomedical Circuits and Systems · 2017
- Discrete‐level memristive circuits for HTM‐based spatiotemporal data classification system
IET Cyber-Physical Systems Theory & Applications · 2017
- Design and implication of a rule based weight sparsity module in HTM spatial pooler
2017
- On-chip Face Recognition System Design with Memristive Hierarchical\n Temporal Memory
arXiv (Cornell University) · 2017
- arXiv (Cornell University)×5
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems×2
- IEEE Transactions on Biomedical Circuits and Systems×1
- InTech eBooks×1
- IET Cyber-Physical Systems Theory & Applications×1
- Manish Nagaraj
Engineering · Purdue University West Lafayette
- Yufei Guo
Engineering · Purdue University West Lafayette
- Chamika Liyanagedera
Engineering · Purdue University West Lafayette
- Wachirawit Ponghiran
Engineering · Purdue University West Lafayette
- Utkarsh Saxena
Engineering · Purdue University West Lafayette
This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.
Last updated Jul 20, 2026.
Claim or correct this profile