Srinivasan Subramaniyan

Computer Science · The Ohio State University

Early career · publishing since 2020

Parallel Computing and Optimization Techniques Advanced Wireless Communication Techniques Error Correcting Code Techniques Cloud Computing and Resource Management Real-Time Systems Scheduling

Publications

Citations

101

Est. group size

Recurring co-author estimate

Active years

Publishing since 2020

Research summary

AI-generated

This researcher works on optimizing GPU systems, focusing on scheduling, power management, and resource allocation for both real-time embedded systems and large-scale AI data centers. Earlier work centered on designing efficient error-correcting code decoders (LDPC) and hardware accelerators using FPGAs and GPUs. The overall focus blends systems-level performance engineering with hardware-aware optimization for machine learning workloads.

GPU scheduling and resource managementPower and energy optimization for data centersReal-time embedded GPU systemsMachine learning inference and training system optimizationError-correcting codes and hardware accelerators (FPGA/GPU)

Publication output was low and intermittent from 2017-2024 but has grown sharply in 2025-2026, suggesting increasing recent activity.

Generated by claude-sonnet-5 from public bibliographic data · Jul 20, 2026

Publication cadence

Publications per year over the last 10 years — averaging 2.2/year recently

Recent publications

CATS: Correlation-aware Task Scheduling for GPU Power Optimization in AI Data Centers
2026
DySM: Dynamic Scaling of GPU Streaming Multiprocessor in Spatially Shared Real-Time Embedded GPU Systems
Open MIND · 2026
DySM: Dynamic Scaling of GPU Streaming Multiprocessor in Spatially Shared Real-Time Embedded GPU Systems (Artifact)
Dagstuhl Research Online Publication Server · 2026
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems
ACM Transactions on Embedded Computing Systems · 2025
Power Capping of GPU Servers for Machine Learning Inference Optimization
2025
Exploiting ML Task Correlation in the Minimization of Capital Expense for GPU Data Centers
2025
SEEB-GPU: Early-Exit Aware Scheduling and Batching for Edge GPU Inference
2025
Latency-Guaranteed Co-Location of Inference and Training for Reducing Data Center Expenses
2024
OptiCPD: Optimization For The Canonical Polyadic Decomposition Algorithm on GPUs
2023
Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders
IEEE Design and Test · 2022
MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication
2022
A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures
IEEE Communications Surveys & Tutorials · 2021
Gbit/s Non-Binary LDPC Decoders: High-Throughput using High-Level Specifications
2020
Pushing the Limits of Energy Efficiency for Non-Binary LDPC Decoders on GPUs and FPGAs
2020

Publishes in

IEEE Communications Surveys & Tutorials×1
ACM Transactions on Embedded Computing Systems×1
IEEE Design and Test×1
Open MIND×1
Dagstuhl Research Online Publication Server×1

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This profile was generated automatically from public scholarly data (OpenAlex). Group size and activity levels are estimates derived from co-authorship patterns.

Last updated Jul 19, 2026.

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